Group III nitride crystals suitably used in light emitting devices, electronic devices, and semiconductor sensors are generally produced by crystal growth on a main plane of a sapphire substrate having a (0001) main plane or a GaAs substrate having a (111) A main plane by a vapor-phase growth method, such as a hydride vapor phase epitaxy (HVPE) method or a metalorganic chemical vapor deposition (MOCVD) method, or a liquid-phase growth method, such as a flux method. Thus, group III nitride crystals generally produced have a main plane with a {0001} plane orientation.
A light emitting device in which a light-emitting layer having a multi-quantum well (MQW) structure is formed on a main plane of a group III nitride crystal substrate having the main plane with a {0001} plane orientation generates spontaneous polarization in the light-emitting layer because of the polarity of the group III nitride crystal in a <0001> direction. The spontaneous polarization reduces luminous efficiency. Thus, there is a demand for the production of a group III nitride crystal having a main plane with a plane orientation other than {0001}.
The following methods have been proposed as a method for producing a group III nitride crystal having a main plane with a plane orientation other than {0001}. For example, Japanese Unexamined Patent Application Publication No. 2005-162526 (Patent Literature 1) discloses the following method for producing a GaN crystal having a surface with any plane orientation independent of the substrate plane orientation. A plurality of rectangular parallelepiped crystalline masses are cut from a GaN crystal grown by a vapor-phase growth method. After a silicon oxide film is formed on the surface of a sapphire substrate prepared separately, a plurality of depressions reaching the substrate are formed. The plurality of crystalline masses are embedded in the depressions such that the top surfaces of the crystalline masses are unidirectionally oriented. Gallium nitride crystals having a surface with a certain plane orientation are then grown by a vapor-phase growth method using the crystalline masses as seeds.
Japanese Unexamined Patent Application Publication No. 2006-315947 (Patent Literature 2) discloses the following method for producing a nitride semiconductor wafer that can achieve both a low dislocation density and a large area. A primary wafer formed of a hexagonal nitride semiconductor and having two facing main C planes is prepared. The primary wafer is then cut along an M plane to produce a plurality of nitride semiconductor bars. The plurality of nitride semiconductor bars are then arranged such that the C planes of adjacent nitride semiconductor bars face each other and the M plane of each of the nitride semiconductor bars becomes the top surface. A nitride semiconductor is then regrown on the top surfaces of the arranged nitride semiconductor bars to form a nitride semiconductor layer having a continuous M plane as the main plane.
Japanese Unexamined Patent Application Publication No. 2008-143772 (Patent Literature 3) discloses the following method for producing a high-crystallinity group III nitride crystal that has a main plane other than {0001}. A plurality of group III nitride crystal substrates having a main plane with a certain plane orientation are cut from a group III nitride bulk crystal. The substrates are then transversely arranged adjacent to each other such that the main planes of the substrates are parallel to each other and the substrates have the same [0001] direction. A group III nitride crystal is then grown on the main planes of the substrates.